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analy_ia64.cc

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00001 /* 
00002  *      HT Editor
00003  *      analy_ia64.cc
00004  *
00005  *      Copyright (C) 1999-2002 Sebastian Biallas (sb@web-productions.de)
00006  *
00007  *      This program is free software; you can redistribute it and/or modify
00008  *      it under the terms of the GNU General Public License version 2 as
00009  *      published by the Free Software Foundation.
00010  *
00011  *      This program is distributed in the hope that it will be useful,
00012  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
00013  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00014  *      GNU General Public License for more details.
00015  *
00016  *      You should have received a copy of the GNU General Public License
00017  *      along with this program; if not, write to the Free Software
00018  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
00019  */
00020 
00021 #include <string.h>
00022 
00023 #include "analy_ia64.h"
00024 #include "analy_register.h"
00025 #include "ia64dis.h"
00026 #include "htiobox.h"
00027 #include "snprintf.h"
00028 
00029 /*
00030  *
00031  */
00032 void AnalyIA64Disassembler::init(Analyser *A)
00033 {
00034         disasm = new IA64Disassembler();
00035         AnalyDisassembler::init(A);
00036 }
00037 
00038 /*
00039  *
00040  */
00041 void AnalyIA64Disassembler::done()
00042 {
00043         AnalyDisassembler::done();
00044 }
00045 
00046 OBJECT_ID AnalyIA64Disassembler::object_id() const
00047 {
00048         return ATOM_ANALY_IA64;
00049 }
00050 
00051 /*
00052  *
00053  */
00054 Address *AnalyIA64Disassembler::branchAddr(OPCODE *opcode, branch_enum_t branchtype, bool examine)
00055 {
00056         IA64DisInsn *dis_insn = (IA64DisInsn*)opcode;
00057         IA64SlotDisInsn *slot = &dis_insn->slot[dis_insn->selected];
00058         for (int j=0; j<7; j++) {
00059                 if (slot->op[j].type == IA64_OPERAND_ADDRESS) {
00060                         Address *addr = new AddressFlat64(slot->op[j].imm);
00061                         return addr;
00062                 }
00063         }
00064         return new InvalidAddress();
00065 }
00066 
00067 Address *AnalyIA64Disassembler::createAddress(dword offset)
00068 {
00069         return new AddressFlat32(offset);
00070 }
00071 
00072 /*
00073  *
00074  */
00075 void AnalyIA64Disassembler::examineOpcode(OPCODE *opcode)
00076 {
00077 /*     IA64DisInsn *dis_insn = (IA64DisInsn*)opcode;
00078         IA64SlotDisInsn *slot = &dis_insn->slot[dis_insn->selected];
00079         for (int j=0; j<7; j++) {
00080                 if (slot->op[j].type == IA64_OPERAND_ADDRESS) {
00081                         Address *addr = new AddressFlat64(slot->op[j].imm);
00082                         if (analy->validAddress(addr, scvalid)) {
00083                                 taccess access;
00084                                 xref_enum_t xref = xrefoffset;
00085                                 access.type = acoffset;
00086                                 access.indexed = false;
00087                                 analy->dataAccess(addr, access);
00088                                 analy->addXRef(addr, analy->addr, xref);
00089                         }
00090                 }
00091         }*/
00092 }
00093 
00094 /*
00095  *
00096  */
00097 branch_enum_t AnalyIA64Disassembler::isBranch(OPCODE *opcode)
00098 {
00099         IA64DisInsn *dis_insn = (IA64DisInsn *) opcode;
00100         IA64SlotDisInsn *slot = &dis_insn->slot[dis_insn->selected];
00101         if (strncmp(slot->opcode->name, "br.", 3)==0) {
00102                 if (strncmp(slot->opcode->name+3, "call", 4)==0) {
00103                         return br_call;
00104                 } else if (strncmp(slot->opcode->name+3, "cond", 4)==0) {
00105                         if (slot->qp) {
00106                                 return br_jXX;
00107                         } else {
00108                                 return br_jump;
00109                         }
00110                 } else if (strncmp(slot->opcode->name+3, "ret", 3)==0) {
00111                         if (!slot->qp) return br_return;
00112                 }
00113         }
00114         return br_nobranch;
00115 }

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